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Apalis Evaluation Board Data Sheet Now Avaliable
2013年2月22日金曜日
The data sheet for the Apalis Evaluation Board is now available. The Apalis Evaluation Board is a flexible development environment with which you can explore and evaluate the functionality and performance of the Apalis product family. Apalis interfaces can be easily accessed by means of physical connectors and standard pitch headers. The breakout area allows for convenient probing of the large number of Apalis interfaces as well as easy breaking and jumpering of signals.
The Apalis Evaluation Board PCB is comprised of four layers, of which only one is used for high speed signal routing. This demonstrates how the Direct Breakout technology makes it incredibly easy to implement leading edge interfaces with minimal risk and effort. CAE data for the board, including schematics, layout and IPC-7351 compliant component libraries, are freely downloadable from our developer website.
It can be downloaded from: https://docs.toradex.cn/101028-apalis-evaluation-board-datasheet.pdf.
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